1. Field of the Invention
The invention relates to a semiconductor structure, and more particularly to a counter-doped semiconductor structure.
2. Related Art
At present, commercial silicon-carbide products, such as diodes, metal oxide semiconductor field effect transistors (MOSFETs), junction field effect transistors (JFETs) and bipolar junction transistors (BJTs), have edge terminations being key functions for ensuring high-voltage operations.
Referring to the prior arts of FIGS. 1 to 5, a guard ring and a junction termination extension (JTE) are two important technological features of a plane edge terminal. FIG. 1 shows a P-type JTE of a single area. FIG. 2 shows a P-type JTE of a single area arranged in conjunction with an outer P-type guard ring. FIG. 3 shows P-type JTEs of two areas. FIG. 4 shows P-type JTEs of two areas arranged in conjunction with a P-type inner guard ring and an outer guard ring. FIG. 5 shows a P-type JTE of a single area arranged in conjunction with a P-type inner guard ring and an outer guard ring.
The prior art provides a semiconductor structure comprising an N-type silicon carbide layer 11 on which a P-type doped area 12 and a P-type JTE area 13 are disposed.
As shown in FIGS. 1 and 2, each of the structures is a single P-type JTE, wherein the structure of FIG. 2 is a P-type JTE of a single area arranged in conjunction with an outer guard ring 14. Each of FIGS. 3 and 4 shows P-type JTEs of two areas, wherein the structure of FIG. 4 comprises P-type JTEs of two areas arranged in conjunction with an outer guard ring 14. As shown in FIG. 5, an inner P-type guard ring 15 of the prior art is used to provide the same charge, so that the charge concentration of the P-type JTE is increased, and the object of adjusting the charges is achieved.